DIGITAL DESIGN, VERIFICATION, MIXED SIGNAL ASICs SIMULATION
SafeLogic SRL
SafeLogic company is providing the high quality frontend services for the integrated circuits development. Our main expertise is in digital design and verification, with additional experience in the mixed signal ASICs simulation. We are familiar and applied ASIL (ISO 26262) standard across multiple projects, which were designed for automotive and manufactured by Infineon Technologies. Among the projects we contributed, are the SoC with well known ARM cores, AHB communication bus and multiple peripherals using SPI, UART, I2C, CAN, LIN protocols. During the projects development, we are focusing on quality and efficiency.
We are based in Chisinau and perform the work mostly remotely, with short trips to the customer site when required.
Services
- Digital Design and Verification,
- Design Synthesizable Code,
- DFT design,
- Define Verification Plan,
- Build UVM Testbenches,
- Write Test Sequences,
- Define Functional Coverage,
- Logic Modelling,
- Simulation and debugging,
- Run Regressions,
- Code Coverage Analysis,
- Gatelevel Simulation,
- FPGA prototyping,
Languages
- VHDL,
- Verilog,
- SystemVerilog.
Tags
- Digital Design, Digital Verification, Verification Plan, Testbench, Coverage, DFT, VHDL, Verilog, SystemVerilog, UVM, ASIC, Integrated Circuits, SoC, Modelling, Gatelevel, Mixed Signal, AMS, Questasim, Xcelium, Vmanager, Virtuoso, FPGA
Labor force
Digital Design and Verification Engineers
Infrastructure
Office spaces, notebooks, monitors
Quick Contact
Web:
www.safelogic.md
Email:
andrei.covalenco@safelogic.md
Phone:
(+373) 69 434 443
Address:
Bd. Stefan cel Mare 65, of.811, Chisinau